Addressing Modes MCQ Questions
This section focuses on "Addressing Modes" in Computer Organization & Architecture. These Multiple Choice Questions (MCQ) should be practiced to improve the Computer Organization & Architecture skills required for various interviews (campus interviews, walk-in interviews, company interviews), placements, entrance exams and other competitive examinations.
1. Addressing modes for 8086 instructions are divided into?
Explanation: Addressing modes for 8086 instructions are divided into two categories
2. In ________ the operand is specified in the instruction itself
Explanation: Implied mode:: In implied addressing the operand is specified in the instruction itself.
3. In which mode the operand is placed in one of 8 bit or 16 bit general purpose registers?
Explanation: Register mode: In register addressing the operand is placed in one of 8 bit or 16 bit general purpose registers. The data is in the register that is specified by the instruction. Here one register reference is required to access the data.
4. An offset is determined by adding any combination of ________ address elements
Explanation: Effective address or Offset: An offset is determined by adding any combination of three address elements: displacement, base and index.
5. Zero address instruction are designed with implied addressing mode.
Explanation: In this mode the data is 8 bits or 16 bits long and data is the part of instruction.Zero address instruction are designed with implied addressing mode.
6. Add #45, when this instruction is executed the following happen/s _______
Explanation: Add #45, when this instruction is executed the following happen/s The value stored in memory location 45 is retrieved and one more operand is requested.
7. In the following indexed addressing mode instruction, MOV 5(R1), LOC the effective address is ______
Explanation: This instruction is in Base with offset addressing mode.
8. The addressing mode/s, which uses the PC instead of a general purpose register is ______
Explanation: In this, the contents of the PC are directly incremented.
9. The effective address of the following instruction is MUL 5(R1,R2).
Explanation: The addressing mode used is base with offset and index
10. _____ addressing mode is most suitable to change the normal sequence of execution of instructions.
Explanation: The relative addressing mode is used for this since it directly updates the PC.