Computer Organization & Architecture Quiz


Play this quiz that will help you to excel in Computer Organization & Architecture certification exams, placements etc. This Computer Organization & Architecture quiz consist of 10 questions that you need to solve in 10 minutes. We’ve specially designed this quiz so that you can quickly acquaint to the pattern of questions you can be asked in placement drives, certification exams etc. This Computer Organization & Architecture test enables you to assess your knowledge of Computer Architecture.

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Computer Architecture MCQ Questions

Practice Computer Architecture MCQ Questions, which will help you to understand computer organization and architecture easily and will help you to prepare for placements, interviews and other competitive exams.

Computer Organization & Architecture Quiz

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Computer Organization & Architecture Quiz

1. When when power is switched off which memory loses its data?

Non-Volatile Memory
Volatile Memory
Both A and B
None of the above

2. The _____ is a hardware implementation to reduce the access time for processor operations.

RAM
ROM
Cache
All of the above

3. The ISA is an architectural standard developed by ______.

IBM
AT&T Labs
Microsoft
Oracle

4. Which of the following is not a Pipeline Conflicts?

Timing Variations
Branching
Load Balancing
Data Dependency

5. The addressing mode/s, which uses the PC instead of a general purpose register is ______

Indexed with offset
Relative
Direct
Both Indexed with offset and direct

6. In the following indexed addressing mode instruction, MOV 5(R1), LOC the effective address is ______

EA = 5+R1
EA = R1
EA = [R1]
EA = 5+[R1]

7. Add #45, when this instruction is executed the following happen/s _______

The processor raises an error and requests for one more operand
The value stored in memory location 45 is retrieved and one more operand is requested
The value 45 gets added to the value on the stack and is pushed onto the stack
None of the above

8. The Interrupt-request line is a _________ along which the device is allowed to send the interrupt signal.

Data line
control line
Address line
None of the above

9. Zero address instruction are designed with implied addressing mode.

TRUE
FALSE
Can be true or false
Can not say

10. What is the full form of CISC?

Complex Instruction Set Computer.
Completed Instruction Set Computer.
Control Instruction Set Computer.
None of the above

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