Computer Organization & Architecture Quiz


Play this quiz that will help you to excel in Computer Organization & Architecture certification exams, placements etc. This Computer Organization & Architecture quiz consist of 10 questions that you need to solve in 10 minutes. We’ve specially designed this quiz so that you can quickly acquaint to the pattern of questions you can be asked in placement drives, certification exams etc. This Computer Organization & Architecture test enables you to assess your knowledge of Computer Architecture.

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Computer Architecture MCQ Questions

Practice Computer Architecture MCQ Questions, which will help you to understand computer organization and architecture easily and will help you to prepare for placements, interviews and other competitive exams.

Computer Organization & Architecture Quiz

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Computer Organization & Architecture Quiz

1. In Daisy Chaining Priority, the device with the highest priority is placed at the ______.

First Position
Last Position
Can be placed anywhere
Depend on device

2. What is the hexadecimal equivalent of a binary number 10101111 ?

AB
AC
AF
AD

3. Half adder is an example of

Combinational Circuits
Sequential Circuits
Asynchronous Circuits
Synchronous Circuits

4. In Arithmetic Pipeline, the floating point addition and subtraction is done in ____________ parts.

2
3
4
5

5. What is the full form of RISC?

Read Instruction Set Architecture
Reduced Instruction Set Computer.
Register Instruction Set Computer.
None of the above

6. Both the CISC and RISC architectures have been developed to reduce the ______

Semantic gap
Time Delay
Cost
Reduced Code

7. The offset used in the conditional branching is __________ bit.

8
16
24
32

8. Auxillary memory access time is generally ________ times that of the main memory

10
100
1000
10000

9. What is true about memory unit?

A memory unit is the collection of storage units or devices together.
The memory unit stores the binary information in the form of bits.
Both A and B
None of the above

10. The fastest data access is provided using _______

Cache
DRAM's
SRAM's
Registers

Results