Computer Organization & Architecture Quiz


Play this quiz that will help you to excel in Computer Organization & Architecture certification exams, placements etc. This Computer Organization & Architecture quiz consist of 10 questions that you need to solve in 10 minutes. We’ve specially designed this quiz so that you can quickly acquaint to the pattern of questions you can be asked in placement drives, certification exams etc. This Computer Organization & Architecture test enables you to assess your knowledge of Computer Architecture.

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Computer Architecture MCQ Questions

Practice Computer Architecture MCQ Questions, which will help you to understand computer organization and architecture easily and will help you to prepare for placements, interviews and other competitive exams.

Computer Organization & Architecture Quiz

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Computer Organization & Architecture Quiz

1. Which table handle stores the addresses of the interrupt handling sub-routines?

Interrupt-vector table
Vector table
Symbol link table
All of the above

2. The effective address of the following instruction is MUL 5(R1,R2).

5+R1+R2
5+(R1*R2)
5+[R1]+[R2]
5*([R1]+[R2])

3. What is the hexadecimal equivalent of a binary number 10101111 ?

AB
AC
AF
AD

4. Input or output devices that are connected to computer are called ______________.

Input/Output Subsystem
Peripheral Devices
Interfaces
Interrupt

5. Arithmetic Pipeline is used for?

floating point operations
interger operations
character operations
None of the above

6. Which of the following is correct refreshed rate for DRAM?

10~1000 ms
10~50 ms
10~100 ms
10~500 ms

7. The RUN signal increments the step counter by _____ for each clock cycle.

One
Two
Three
No Limit

8. Which instruction is used to list the registers used for execution?

ASSIGN
RN
PSLOAD
ADR

9. What is the full form of CISC?

Complex Instruction Set Computer.
Completed Instruction Set Computer.
Control Instruction Set Computer.
None of the above

10. In memory-mapped I/O ____________

The I/O devices have a separate address space
The I/O devices and the memory share the same address space
A part of the memory is specifically set aside for the I/O operation
The memory and I/O devices have an associated address space

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